[llvm-branch-commits] [llvm] [AMDGPU] Machine verifier size check for 16bit register (PR #219734)

[Matt Arsenault via llvm-branch-commits]

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@@ -5290,9 +5290,78 @@ bool SIInstrInfo::verifyCopy(const MachineInstr &MI,
     ErrInfo = "illegal copy from vector register to SGPR";
     return false;
   }
+  // check for sreg32/vgpr3/vgpr16 mismatch
+  unsigned DstSubReg = MI.getOperand(0).getSubReg();
+  unsigned SrcSubReg = MI.getOperand(1).getSubReg();
+  auto *TRI = MRI.getTargetRegisterInfo();
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arsenm wrote:

```suggestion
```

RI is already in scope and used 

https://github.com/llvm/llvm-project/pull/219734