[llvm-branch-commits] [clang] [lld] [llvm] [mlir] [RFC][AMDGPU] Add BARRIER address space (PR #195613)

[Nicolai Hähnle via llvm-branch-commits]

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@@ -1143,6 +1144,23 @@ supported for the ``amdgcn`` target.
   a buffer strided pointer, this means that the base pointer is ``align(4)``, that
   the offset is a multiple of 4 bytes, and that the stride is a multiple of 4.
 
+**Barrier**
+  This address space represents barrier IDs (introduced in GFX12) as addresses.
+  It does not map directly to any addressable memory, thus pointers into this address space:
+
+  * Never alias with any other pointers outside this address space.
+  * Cannot be dereferenced.
+  * Can only be consumed by intrinsics.
+  * Are always uniform.
+
+  Pointer are 32 bits and directly correspond to valid barrier IDs. All barrier pointers must,
+  when interpreted as signed 32 bit integers, have a value corresponding to a valid barrier ID
+  on the target. Otherwise, the behavior is undefined.
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nhaehnle wrote:

Maybe note here that using a null pointer is actually well-defined in many cases? It is potentially useful if somebody wanted to signal a barrier conditionally.

https://github.com/llvm/llvm-project/pull/195613