[llvm-branch-commits] [llvm] [X86] Remove shouldCastAtomicLoadInIR; use DAG combine instead (PR #199520)

[via llvm-branch-commits]

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@@ -54226,6 +54220,29 @@ static SDValue combineConstantPoolLoads(SDNode *N, const SDLoc &dl,
   return SDValue();
 }
 
+static SDValue combineAtomicLoad(SDNode *N, SelectionDAG &DAG,
+                                 TargetLowering::DAGCombinerInfo &DCI) {
+  if (!DCI.isBeforeLegalize())
+    return SDValue();
+
+  auto *AN = cast<AtomicSDNode>(N);
+  EVT VT = AN->getValueType(0);
+  if (!VT.getScalarType().isFloatingPoint())
+    return SDValue();
+
+  unsigned BitWidth = VT.getStoreSizeInBits();
+  if (BitWidth == 0 || BitWidth != VT.getSizeInBits())
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jofrn wrote:

You're correct. The check for FP types implies we can't have zero BitWidth. Thank you.

https://github.com/llvm/llvm-project/pull/199520