[llvm-branch-commits] [DXIL][Analysis] Implement enough of DXILResourceAnalysis for buffers (PR #100699)
Justin Bogner via llvm-branch-commits
llvm-branch-commits at lists.llvm.org
Mon Jul 29 14:52:50 PDT 2024
================
@@ -331,6 +336,249 @@ std::pair<uint32_t, uint32_t> ResourceInfo::getAnnotateProps() const {
return {Word0, Word1};
}
+void ResourceInfo::print(raw_ostream &OS) const {
+ OS << " Symbol: ";
+ Symbol->printAsOperand(OS);
+ OS << "\n";
+
+ OS << " Name: \"" << Name << "\"\n"
+ << " Binding:\n"
+ << " Unique ID: " << Binding.UniqueID << "\n"
+ << " Space: " << Binding.Space << "\n"
+ << " Lower Bound: " << Binding.LowerBound << "\n"
+ << " Size: " << Binding.Size << "\n"
+ << " Class: " << static_cast<unsigned>(RC) << "\n"
+ << " Kind: " << static_cast<unsigned>(Kind) << "\n";
+
+ if (isCBuffer()) {
+ OS << " CBuffer size: " << CBufferSize << "\n";
+ } else if (isSampler()) {
+ OS << " Sampler Type: " << static_cast<unsigned>(SamplerTy) << "\n";
+ } else {
+ if (isUAV()) {
+ OS << " Globally Coherent: " << UAVFlags.GloballyCoherent << "\n"
+ << " HasCounter: " << UAVFlags.HasCounter << "\n"
+ << " IsROV: " << UAVFlags.IsROV << "\n";
+ }
+ if (isMultiSample())
+ OS << " Sample Count: " << MultiSample.Count << "\n";
+
+ if (isStruct()) {
+ OS << " Buffer Stride: " << Struct.Stride << "\n";
+ uint32_t AlignLog2 = Struct.Alignment ? Log2(*Struct.Alignment) : 0;
+ OS << " Alignment: " << AlignLog2 << "\n";
+ } else if (isTyped()) {
+ OS << " Element Type: " << static_cast<unsigned>(Typed.ElementTy) << "\n"
+ << " Element Count: " << static_cast<unsigned>(Typed.ElementCount)
+ << "\n";
+ } else if (isFeedback())
+ OS << " Feedback Type: " << static_cast<unsigned>(Feedback.Type) << "\n";
+ }
+}
+
+//===----------------------------------------------------------------------===//
+// ResourceMapper
+
+static dxil::ElementType toDXILElementType(Type *Ty, bool IsSigned) {
+ // TODO: Handle unorm, snorm, and packed.
+ Ty = Ty->getScalarType();
+
+ if (Ty->isIntegerTy()) {
+ switch (Ty->getIntegerBitWidth()) {
+ case 16:
+ return IsSigned ? ElementType::I16 : ElementType::U16;
+ case 32:
+ return IsSigned ? ElementType::I32 : ElementType::U32;
+ case 64:
+ return IsSigned ? ElementType::I64 : ElementType::U64;
+ case 1:
+ default:
+ return ElementType::Invalid;
+ }
+ } else if (Ty->isFloatTy()) {
+ return ElementType::F32;
+ } else if (Ty->isDoubleTy()) {
+ return ElementType::F64;
+ } else if (Ty->isHalfTy()) {
+ return ElementType::F16;
+ }
+
+ return ElementType::Invalid;
+}
+
+namespace {
+
+class ResourceMapper {
+ Module &M;
+ LLVMContext &Context;
+ DXILResourceMap &Resources;
+
+ // Unique ID is per resource type to match DXC.
+ uint32_t NextUAV = 0;
+ uint32_t NextSRV = 0;
+ uint32_t NextCBuf = 0;
+ uint32_t NextSmp = 0;
----------------
bogner wrote:
This is the "Unique resource record ID" in the [DXIL resource metadata](https://github.com/microsoft/DirectXShaderCompiler/blob/main/docs/DXIL.rst#metadata-resource-records). I'll go ahead and rename it to "RecordID" to make this a bit clearer.
https://github.com/llvm/llvm-project/pull/100699
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