[llvm-branch-commits] [lld] 2eba4dd - [ELF] Rewrite R_RISCV_ALIGN nops when r.addend%4 != 0
Tobias Hieta via llvm-branch-commits
llvm-branch-commits at lists.llvm.org
Tue Sep 27 23:16:58 PDT 2022
Author: Fangrui Song
Date: 2022-09-28T08:16:35+02:00
New Revision: 2eba4dd78e2a47a36a65617f17d5ea156cfb6448
URL: https://github.com/llvm/llvm-project/commit/2eba4dd78e2a47a36a65617f17d5ea156cfb6448
DIFF: https://github.com/llvm/llvm-project/commit/2eba4dd78e2a47a36a65617f17d5ea156cfb6448.diff
LOG: [ELF] Rewrite R_RISCV_ALIGN nops when r.addend%4 != 0
For RVC, GNU assembler and LLVM integrated assembler add c.nop followed by a
sequence of 4-byte nops. Even if remove % 4 == 0, we have to split one 4-byte
nop and therefore need to write the code sequence, otherwise we create an
incorrect c.unimp.
(cherry picked from commit 78084d9e77b9a2017e2215491b71b37c2671c292)
Added:
Modified:
lld/ELF/Arch/RISCV.cpp
lld/test/ELF/riscv-relax-align-rvc.s
Removed:
################################################################################
diff --git a/lld/ELF/Arch/RISCV.cpp b/lld/ELF/Arch/RISCV.cpp
index 8fca1a686a79..56a516f9cdc1 100644
--- a/lld/ELF/Arch/RISCV.cpp
+++ b/lld/ELF/Arch/RISCV.cpp
@@ -750,12 +750,13 @@ void elf::riscvFinalizeRelax(int passes) {
p += size;
// For R_RISCV_ALIGN, we will place `offset` in a location (among NOPs)
- // to satisfy the alignment requirement. If `remove` is a multiple of 4,
- // it is as if we have skipped some NOPs. Otherwise we are in the middle
- // of a 4-byte NOP, and we need to rewrite the NOP sequence.
+ // to satisfy the alignment requirement. If both `remove` and r.addend
+ // are multiples of 4, it is as if we have skipped some NOPs. Otherwise
+ // we are in the middle of a 4-byte NOP, and we need to rewrite the NOP
+ // sequence.
int64_t skip = 0;
if (r.type == R_RISCV_ALIGN) {
- if (remove % 4 != 0) {
+ if (remove % 4 || r.addend % 4) {
skip = r.addend - remove;
int64_t j = 0;
for (; j + 4 <= skip; j += 4)
diff --git a/lld/test/ELF/riscv-relax-align-rvc.s b/lld/test/ELF/riscv-relax-align-rvc.s
index 37758ed81321..01cbbd8bdebf 100644
--- a/lld/test/ELF/riscv-relax-align-rvc.s
+++ b/lld/test/ELF/riscv-relax-align-rvc.s
@@ -50,6 +50,12 @@
# CHECK-NEXT: c.addi a0, 8
# CHECK-EMPTY:
+# CHECK: <.text2>:
+# CHECK-NEXT: addi a0, a1, 1
+# CHECK-NEXT: c.addi a0, 1
+# CHECK-NEXT: c.nop
+# CHECK-NEXT: c.addi a0, 2
+
.global _start
_start:
c.addi a0, 1
@@ -73,3 +79,10 @@ d:
c.addi a0, 8
.size d, . - d
.size _start, . - _start
+
+.section .text2,"ax"
+.balign 16
+ addi a0, a1, 1
+ c.addi a0, 1
+.balign 8
+ c.addi a0, 2
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