[llvm-branch-commits] [llvm] d0f27fb - [RISCV] Fixing stack offset for RVV object with vararg in stack.

[Tom Stellard via llvm-branch-commits]

Author: Kito Cheng
Date: 2022-04-14T13:02:35-07:00
New Revision: d0f27fb449525528a5688b7678dd9a8082bb6c41

URL: https://github.com/llvm/llvm-project/commit/d0f27fb449525528a5688b7678dd9a8082bb6c41
DIFF: https://github.com/llvm/llvm-project/commit/d0f27fb449525528a5688b7678dd9a8082bb6c41.diff

LOG: [RISCV] Fixing stack offset for RVV object with vararg in stack.

We found LLVM generate wrong stack offset for RVV object when stack
having variable argument, that cause by we didn't count vaarg part during
calculate RVV stack objects.

Also update the stack layout diagram for including vaarg in the diagram.

Stack layout ref:
https://github.com/gcc-mirror/gcc/blob/master/gcc/config/riscv/riscv.cc#L3941

Reviewed By: rogfer01

Differential Revision: https://reviews.llvm.org/D123180

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
    llvm/test/CodeGen/RISCV/rvv/wrong-stack-offset-for-rvv-object.mir

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/RISCV/RISCVFrameLowering.cpp b/llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
index f3cc7d3fb46fa..8f250eeb7248a 100644
--- a/llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
@@ -674,7 +674,10 @@ RISCVFrameLowering::getFrameIndexReference(const MachineFunction &MF, int FI,
     if (hasBP(MF)) {
       FrameReg = RISCVABI::getBPReg();
       // |--------------------------| -- <-- FP
-      // | callee-saved registers   | | <----.
+      // | callee-allocated save    | | <----|
+      // | area for register varargs| |      |
+      // |--------------------------| |      |
+      // | callee-saved registers   | |      |
       // |--------------------------| --     |
       // | realignment (the size of | |      |
       // | this area is not counted | |      |
@@ -699,7 +702,10 @@ RISCVFrameLowering::getFrameIndexReference(const MachineFunction &MF, int FI,
     } else {
       FrameReg = RISCV::X2;
       // |--------------------------| -- <-- FP
-      // | callee-saved registers   | | <----.
+      // | callee-allocated save    | | <----|
+      // | area for register varargs| |      |
+      // |--------------------------| |      |
+      // | callee-saved registers   | |      |
       // |--------------------------| --     |
       // | realignment (the size of | |      |
       // | this area is not counted | |      |
@@ -742,6 +748,9 @@ RISCVFrameLowering::getFrameIndexReference(const MachineFunction &MF, int FI,
       // the frame size.
       //
       // |--------------------------| -- <-- FP
+      // | callee-allocated save    | |
+      // | area for register varargs| |
+      // |--------------------------| |
       // | callee-saved registers   | |
       // |--------------------------| | MFI.getStackSize()
       // | scalar local variables   | |
@@ -756,7 +765,10 @@ RISCVFrameLowering::getFrameIndexReference(const MachineFunction &MF, int FI,
       // When using SP to access frame objects, we need to add RVV stack size.
       //
       // |--------------------------| -- <-- FP
-      // | callee-saved registers   | | <----.
+      // | callee-allocated save    | | <----|
+      // | area for register varargs| |      |
+      // |--------------------------| |      |
+      // | callee-saved registers   | |      |
       // |--------------------------| --     |
       // | Padding after RVV        | |      |
       // | (not counted in          | |      |
@@ -786,8 +798,11 @@ RISCVFrameLowering::getFrameIndexReference(const MachineFunction &MF, int FI,
           Offset += StackOffset::getFixed(MFI.getStackSize());
         }
       } else if (MFI.getStackID(FI) == TargetStackID::ScalableVector) {
+        int ScalarLocalVarSize = MFI.getStackSize() -
+                                 RVFI->getCalleeSavedStackSize() -
+                                 RVFI->getVarArgsSaveSize();
         Offset += StackOffset::get(
-            alignTo(MFI.getStackSize() - RVFI->getCalleeSavedStackSize(), 8),
+            alignTo(ScalarLocalVarSize, 8),
             RVFI->getRVVStackSize());
       }
     }

diff  --git a/llvm/test/CodeGen/RISCV/rvv/wrong-stack-offset-for-rvv-object.mir b/llvm/test/CodeGen/RISCV/rvv/wrong-stack-offset-for-rvv-object.mir
index 93471f65d5753..2fdd749eb2da7 100644
--- a/llvm/test/CodeGen/RISCV/rvv/wrong-stack-offset-for-rvv-object.mir
+++ b/llvm/test/CodeGen/RISCV/rvv/wrong-stack-offset-for-rvv-object.mir
@@ -164,7 +164,7 @@ body:             |
   ; CHECK-NEXT:   SD killed renamable $x16, killed $x10, 48 :: (store (s64) into %fixed-stack.1, align 16)
   ; CHECK-NEXT:   dead $x0 = PseudoVSETIVLI 2, 69, implicit-def $vl, implicit-def $vtype
   ; CHECK-NEXT:   renamable $v8 = PseudoVMV_V_I_MF8 0, 2, 3, implicit $vl, implicit $vtype
-  ; CHECK-NEXT:   $x10 = ADDI $x2, 40
+  ; CHECK-NEXT:   $x10 = ADDI $x2, 24
   ; CHECK-NEXT:   PseudoVSPILL_M1 killed renamable $v8, killed $x10 :: (store unknown-size into %stack.1, align 8)
   ; CHECK-NEXT: {{  $}}
   ; CHECK-NEXT: bb.1.while.cond:
@@ -179,7 +179,7 @@ body:             |
   ; CHECK-NEXT:   liveins: $x8, $x9
   ; CHECK-NEXT: {{  $}}
   ; CHECK-NEXT:   dead $x0 = PseudoVSETIVLI 2, 69, implicit-def $vl, implicit-def $vtype
-  ; CHECK-NEXT:   $x10 = ADDI $x2, 40
+  ; CHECK-NEXT:   $x10 = ADDI $x2, 24
   ; CHECK-NEXT:   renamable $v8 = PseudoVRELOAD_M1 killed $x10 :: (load unknown-size from %stack.1, align 8)
   ; CHECK-NEXT:   PseudoVSE8_V_MF8 killed renamable $v8, renamable $x8, 2, 3, implicit $vl, implicit $vtype :: (store (s16) into %ir.0, align 1)
   ; CHECK-NEXT:   $x10 = COPY renamable $x9