[clang] [llvm] [AArch64] Add support for Cortex-A520, Cortex-A720 and Cortex-X4 CPUs (PR #72395)

[Lucas Duarte Prates via cfe-commits]

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@@ -1372,6 +1408,11 @@ def ProcessorFeatures {
                                  FeatureSPE, FeatureBF16, FeatureMatMulInt8,
                                  FeatureMTE, FeatureSVE2BitPerm, FeatureFullFP16,
                                  FeatureFP16FML];
+  list<SubtargetFeature> X4 =   [HasV9_2aOps, FeatureSVE, FeatureNEON,
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pratlucas wrote:

Also FEAT_SPEv1p2 (`FeatureSPE_EEF`) is mentioned as supported in the TRM but is missing from this list.

https://github.com/llvm/llvm-project/pull/72395