[clang] [llvm] [AArch64] Add support for Cortex-A520, Cortex-A720 and Cortex-X4 CPUs (PR #72395)

Lucas Duarte Prates via cfe-commits cfe-commits at lists.llvm.org
Thu Nov 16 07:37:28 PST 2023


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@@ -1351,6 +1382,11 @@ def ProcessorFeatures {
                                  FeatureFP16FML, FeatureSVE, FeatureTRBE,
                                  FeatureSVE2BitPerm, FeatureBF16, FeatureETE,
                                  FeaturePerfMon, FeatureMatMulInt8, FeatureSPE];
+  list<SubtargetFeature> A720 = [HasV9_2aOps, FeatureNEON, FeatureMTE,
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pratlucas wrote:

`FeatureNeon`, `FeatureSVE`, `FeatureBF16` and `FeatureMatMulInt8` are already enabled by default on Armv9.2-A. Can they be removed from this list to avoid the redundancy?

https://github.com/llvm/llvm-project/pull/72395


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