[clang] [llvm] [AArch64] Add support for Cortex-A520, Cortex-A720 and Cortex-X4 CPUs (PR #72395)
Lucas Duarte Prates via cfe-commits
cfe-commits at lists.llvm.org
Thu Nov 16 07:37:29 PST 2023
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@@ -1325,6 +1352,10 @@ def ProcessorFeatures {
FeatureMatMulInt8, FeatureBF16, FeatureAM,
FeatureMTE, FeatureETE, FeatureSVE2BitPerm,
FeatureFP16FML];
+ list<SubtargetFeature> A520 = [HasV9_2aOps, FeatureNEON, FeaturePerfMon,
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pratlucas wrote:
`FeatureNeon`, `FeatureMatMulInt8`, `FeatureBF16` and `FeatureFineGrainedTraps` are already enabled by default on Armv9.2-A. Can they be removed from this list to avoid the redundancy?
https://github.com/llvm/llvm-project/pull/72395
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