[PATCH] D105092: [RISCV] (1/2) Add the tail policy argument to builtins/intrinsics.
Craig Topper via Phabricator via cfe-commits
cfe-commits at lists.llvm.org
Wed Sep 22 19:52:22 PDT 2021
craig.topper accepted this revision.
craig.topper added a comment.
This revision is now accepted and ready to land.
Nevermind.
LGTM
================
Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td:1315
vti.RegClass:$merge, vti.RegClass:$rs2, vti.RegClass:$rs1,
- vti.Mask:$vm, GPR:$vl, vti.Log2SEW)>;
+ vti.Mask:$vm, GPR:$vl, vti.Log2SEW, TAIL_AGNOSTIC)>;
----------------
craig.topper wrote:
> This should be TAIL_UNDISTURBED. It has a $merge operand
Err nevermind. Maybe we only cared about the mask. Probably should add the policy to riscv_vselect_vl, but that's for another patch.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D105092/new/
https://reviews.llvm.org/D105092
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