[PATCH] D105092: [RISCV] (1/2) Add the tail policy argument to builtins/intrinsics.

[Craig Topper via Phabricator via cfe-commits]

craig.topper requested changes to this revision.
craig.topper added inline comments.
This revision now requires changes to proceed.


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Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td:1315
                  vti.RegClass:$merge, vti.RegClass:$rs2, vti.RegClass:$rs1,
-                 vti.Mask:$vm, GPR:$vl, vti.Log2SEW)>;
+                 vti.Mask:$vm, GPR:$vl, vti.Log2SEW, TAIL_AGNOSTIC)>;
 
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This should be TAIL_UNDISTURBED. It has a $merge operand


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Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td:1327
                  vti.RegClass:$merge, vti.RegClass:$rs2, uimm5:$imm,
-                 vti.Mask:$vm, GPR:$vl, vti.Log2SEW)>;
+                 vti.Mask:$vm, GPR:$vl, vti.Log2SEW, TAIL_AGNOSTIC)>;
 
----------------
Same here


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Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td:1354
                    vti.RegClass:$merge, vti.RegClass:$rs2, ivti.RegClass:$rs1,
-                   vti.Mask:$vm, GPR:$vl, vti.Log2SEW)>;
+                   vti.Mask:$vm, GPR:$vl, vti.Log2SEW, TAIL_AGNOSTIC)>;
   }
----------------
And here


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Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td:1410
                  vti.RegClass:$merge, vti.RegClass:$rs2, uimm5:$imm,
-                 vti.Mask:$vm, GPR:$vl, vti.Log2SEW)>;
+                 vti.Mask:$vm, GPR:$vl, vti.Log2SEW, TAIL_AGNOSTIC)>;
 
----------------
And here


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Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td:1436
                    vti.RegClass:$merge, vti.RegClass:$rs2, ivti.RegClass:$rs1,
-                   vti.Mask:$vm, GPR:$vl, vti.Log2SEW)>;
+                   vti.Mask:$vm, GPR:$vl, vti.Log2SEW, TAIL_AGNOSTIC)>;
   }
----------------
And here


Repository:
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CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D105092/new/

https://reviews.llvm.org/D105092