[PATCH] D105092: [RISCV] (1/2) Add the tail policy argument to builtins/intrinsics.

[Zakk Chen via Phabricator via cfe-commits]

khchen added inline comments.


================
Comment at: llvm/include/llvm/IR/IntrinsicsRISCV.td:162
   // For unit stride load with mask
   // Input: (maskedoff, pointer, mask, vl)
   class RISCVUSLoadMask
----------------
maybe we could have another NFC patch to update those `argument info` comments.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D105092/new/

https://reviews.llvm.org/D105092