[PATCH] D105142: RFC: Implementing new mechanism for hard register operands to inline asm as a constraint.

[David Chisnall via Phabricator via cfe-commits]

theraven added a comment.

The code looks fine but it would be good to see some docs along with it.  We're currently missing docs on inline assembly entirely and the GCC ones are somewhat... opaque when it comes to describing how constraints work.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D105142/new/

https://reviews.llvm.org/D105142