[PATCH] D105142: RFC: Implementing new mechanism for hard register operands to inline asm as a constraint.

[Anirudh Prasad via Phabricator via cfe-commits]

anirudhp added a comment.

In D105142#2849835 <https://reviews.llvm.org/D105142#2849835>, @theraven wrote:

> The code looks fine but it would be good to see some docs along with it.  We're currently missing docs on inline assembly entirely and the GCC ones are somewhat... opaque when it comes to describing how constraints work.

Thank you for your feedback! By docs do you mind updating/adding some information to the existing LLVM docs(like the langref https://llvm.org/docs/LangRef.html for example), or more comments to the code?


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https://reviews.llvm.org/D105142