[PATCH] D105142: RFC: Implementing new mechanism for hard register operands to inline asm as a constraint.

Anirudh Prasad via Phabricator via cfe-commits cfe-commits at lists.llvm.org
Tue Jun 29 12:22:49 PDT 2021


anirudhp updated this revision to Diff 355332.

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D105142/new/

https://reviews.llvm.org/D105142

Files:
  clang/include/clang/Basic/TargetInfo.h
  clang/lib/Basic/TargetInfo.cpp
  clang/lib/CodeGen/CGStmt.cpp
  clang/test/CodeGen/SystemZ/systemz-inline-asm-02.c
  clang/test/CodeGen/SystemZ/systemz-inline-asm.c
  clang/test/CodeGen/aarch64-inline-asm.c
  clang/test/CodeGen/asm-goto.c
  clang/test/CodeGen/ms-intrinsics.c
  clang/test/CodeGen/z-hard-register-inline-asm.c
  clang/test/Sema/z-hard-register-inline-asm.c

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