[PATCH] D59615: [AArch64] When creating SISD intrinsic calls widen scalar args into a zero vectors, not undef

[Eli Friedman via Phabricator via cfe-commits]

efriedma added a comment.

I see two issues here:

1. We're still generating the wrong instruction.
2. The intrinsic is marked readnone, so any code that depends on whether it sets saturation flags is likely broken anyway.

Given the layers of wrongness here, this seems like a marginal improvement.

Despite all that, I guess this is an improvement... but please at least make the comment in the code reflect this discussion.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D59615/new/

https://reviews.llvm.org/D59615