[all-commits] [llvm/llvm-project] a0868b: [RISCV] fix SP recovery in the function epilogue
dlav-sc via All-commits
all-commits at lists.llvm.org
Wed Oct 2 04:31:48 PDT 2024
Branch: refs/heads/users/dlav-sc/riscv-sp-recovery
Home: https://github.com/llvm/llvm-project
Commit: a0868b21875a1c46086d6ee39f7bd149818eb3ef
https://github.com/llvm/llvm-project/commit/a0868b21875a1c46086d6ee39f7bd149818eb3ef
Author: Daniil Avdeev <daniil.avdeev at syntacore.com>
Date: 2024-10-02 (Wed, 02 Oct 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
M llvm/lib/Target/RISCV/RISCVFrameLowering.h
Log Message:
-----------
[RISCV] fix SP recovery in the function epilogue
This patch fixes SP register recovery in the function epilogue.
Commit: bc20d52c7e51d4e1fabb0834b7561965fa8a6723
https://github.com/llvm/llvm-project/commit/bc20d52c7e51d4e1fabb0834b7561965fa8a6723
Author: Daniil Avdeev <daniil.avdeev at syntacore.com>
Date: 2024-10-02 (Wed, 02 Oct 2024)
Changed paths:
M llvm/test/CodeGen/RISCV/branch-relaxation.ll
M llvm/test/CodeGen/RISCV/out-of-reach-emergency-slot.mir
M llvm/test/CodeGen/RISCV/rvv/addi-scalable-offset.mir
M llvm/test/CodeGen/RISCV/rvv/callee-saved-regs.ll
M llvm/test/CodeGen/RISCV/rvv/emergency-slot.mir
M llvm/test/CodeGen/RISCV/rvv/large-rvv-stack-size.mir
M llvm/test/CodeGen/RISCV/stack-realignment.ll
Log Message:
-----------
[RISCV] update tests
Compare: https://github.com/llvm/llvm-project/compare/1ec6df87bdd0...bc20d52c7e51
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