[all-commits] [llvm/llvm-project] c7ac73: [RISCV] fix SP recovery in the function epilogue
dlav-sc via All-commits
all-commits at lists.llvm.org
Wed Oct 2 04:32:49 PDT 2024
Branch: refs/heads/users/dlav-sc/riscv-sp-recovery
Home: https://github.com/llvm/llvm-project
Commit: c7ac735e56c264aa39c99b785ee78f30f95c36dd
https://github.com/llvm/llvm-project/commit/c7ac735e56c264aa39c99b785ee78f30f95c36dd
Author: Daniil Avdeev <daniil.avdeev at syntacore.com>
Date: 2024-10-02 (Wed, 02 Oct 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
M llvm/lib/Target/RISCV/RISCVFrameLowering.h
Log Message:
-----------
[RISCV] fix SP recovery in the function epilogue
This patch fixes SP register recovery in the function epilogue.
Commit: d8adf8f7b5c71c6496241a28df4ec1e9b4daa66b
https://github.com/llvm/llvm-project/commit/d8adf8f7b5c71c6496241a28df4ec1e9b4daa66b
Author: Daniil Avdeev <daniil.avdeev at syntacore.com>
Date: 2024-10-02 (Wed, 02 Oct 2024)
Changed paths:
M llvm/test/CodeGen/RISCV/branch-relaxation.ll
M llvm/test/CodeGen/RISCV/out-of-reach-emergency-slot.mir
M llvm/test/CodeGen/RISCV/rvv/addi-scalable-offset.mir
M llvm/test/CodeGen/RISCV/rvv/callee-saved-regs.ll
M llvm/test/CodeGen/RISCV/rvv/emergency-slot.mir
M llvm/test/CodeGen/RISCV/rvv/large-rvv-stack-size.mir
M llvm/test/CodeGen/RISCV/stack-realignment.ll
Log Message:
-----------
[RISCV] update tests
Compare: https://github.com/llvm/llvm-project/compare/bc20d52c7e51...d8adf8f7b5c7
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