[all-commits] [llvm/llvm-project] ac182d: [RISCV][GlobalISel] Select ALU GPR instructions

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: ac182deee828731d717ed062977bc8ed358e31b6
      https://github.com/llvm/llvm-project/commit/ac182deee828731d717ed062977bc8ed358e31b6
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2023-09-15 (Fri, 15 Sep 2023)

  Changed paths:
    M llvm/lib/Target/RISCV/CMakeLists.txt
    M llvm/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp
    M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
    A llvm/lib/Target/RISCV/RISCVGISel.td
    A llvm/test/CodeGen/RISCV/GlobalISel/alu-roundtrip-rv64.ll
    A llvm/test/CodeGen/RISCV/GlobalISel/alu-roundtrip.ll
    A llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/alu-rv32.mir
    A llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/alu-rv64.mir
    A llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/alu_m-rv32.mir
    A llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/alu_m-rv64.mir

  Log Message:
  -----------
  [RISCV][GlobalISel] Select ALU GPR instructions

Some instruction selection patterns required for ALU GPR instructions have
already been automatically imported from existing TableGen descriptions -
this patch simply adds testing for them. The first of the GIComplexPatternEquiv
definitions required to select the shiftMaskXLen ComplexPattern has been added.

Some instructions require special handling due to i32 not being a legal
type on RV64 in SelectionDAG so we can't reuse SelectionDAG patterns.

Co-authored-by: Lewis Revill <lewis.revill at embecosm.com>

Reviewed By: nitinjohnraj

Differential Revision: https://reviews.llvm.org/D76445