[all-commits] [llvm/llvm-project] 61d4d9: [TableGen][SelectionDAG] Improve efficiency of enc...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 61d4d9a5d33505727afe52f524b90943f8caf21e
      https://github.com/llvm/llvm-project/commit/61d4d9a5d33505727afe52f524b90943f8caf21e
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2021-02-18 (Thu, 18 Feb 2021)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
    M llvm/test/TableGen/dag-isel-regclass-emit-enum.td
    M llvm/test/TableGen/dag-isel-subregs.td
    M llvm/utils/TableGen/DAGISelMatcherEmitter.cpp

  Log Message:
  -----------
  [TableGen][SelectionDAG] Improve efficiency of encoding negative immediates for isel's CheckInteger opcode.

CheckInteger uses an int64_t encoded using a variable width encoding
that is optimized for encoding a number with a lot of leading zeros.
Negative numbers have no leading zeros so use the largest encoding
requiring 9 bytes.

I believe its most like we want to check for positive and negative
numbers near 0. -1 is quite common due to its use in the 'not'
idiom.

To optimize for this, we can borrow an idea from the bitcode format
and move the sign bit to bit 0 with the magnitude stored in the
upper bits. This will drastically increase the number of leading
zeros for small magnitudes. Then we can run this value through
VBR encoding.

This gives a small reduction in the table size on all in tree
targets except VE where size increased by about 300 bytes due
to intrinsic ids now requiring 3 bytes instead of 2. Since the
intrinsic enum space is shared by all targets this an unfortunate
consquence of where VE is currently located in the range.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D96317