[all-commits] [llvm/llvm-project] 5b094b: [AArch64] Allow folding FMUL/FADD into FMA for FP1...

[Bradley Smith via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 5b094bfeb3ccaf3ba118f161277ade9fc5147272
      https://github.com/llvm/llvm-project/commit/5b094bfeb3ccaf3ba118f161277ade9fc5147272
  Author: Bradley Smith <bradley.smith at arm.com>
  Date:   2021-02-18 (Thu, 18 Feb 2021)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/test/CodeGen/AArch64/f16-instructions.ll

  Log Message:
  -----------
  [AArch64] Allow folding FMUL/FADD into FMA for FP16 types

isFMAFasterThanFMulAndFAdd should return true for FP16 types when
HasFullFP16 is present, since we have the instructions to handle it for
both SVE and NEON. (SVE patterns and tests will follow).

Differential Revision: https://reviews.llvm.org/D96599