[llvm-dev] Scalable Vector Types in IR - Next Steps?

[Jacob Lifshay via llvm-dev]

On Mon, Mar 18, 2019 at 5:26 PM Bruce Hoult via llvm-dev <
llvm-dev at lists.llvm.org> wrote:

> Three ISAs at present:
>
> - SVE in Aarch64
> - MVE in ARM Cortex-M (quite different from SVE)
> - RVV in RISC-V
>
> It would not surprise me if other ISAs implement similar vector
> extensions in future.
>
We're planning on implementing scalable vector support in the SimpleV ISA
extension as well. Admittedly, we will most likely need additional IR
modifications (allowing vectors of vectors), but I think having scalable
vector support already built in will help greatly.

Jacob Lifshay
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