[llvm-dev] x86 and GPU backend support for irregular accesses

[SANJAY SRIVALLABH SINGAPURAM via llvm-dev]

Hello Madhur,

I meant any instructions that enable irregular accesses at the hardware
level, e.g. a subset of Intel's AVX 512 and those here
<https://software.intel.com/en-us/articles/understanding-gather-scatter-instructions-and-the-gather-scatter-unroll-compiler-switch>
.

Thanks,
Sanjay

On Mon, Feb 20, 2017 at 9:49 PM SANJAY SRIVALLABH SINGAPURAM <
llvmresch_int01 at iith.ac.in> wrote:

> Hello !
>
> Does the x86 back-end generate gather-scatter instructions for
> LLVM gather-scatter intrinsics ?
>
> Also, do the NVPTX and AMDGPU back-ends generate equivalent instructions
> for GPUs ?
>
> Thank You,
> Sanjay
>
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