[llvm-dev] x86 and GPU backend support for irregular accesses

[Madhur Amilkanthwar via llvm-dev]

What do you expect by meaning "equivalent" instructions in NVPTX backend?

On Feb 20, 2017 9:56 PM, "Tobias Grosser via llvm-dev" <
llvm-dev at lists.llvm.org> wrote:

> On Mon, Feb 20, 2017, at 05:19 PM, SANJAY SRIVALLABH SINGAPURAM via
> llvm-dev wrote:
> > Hello !
> >
> > Does the x86 back-end generate gather-scatter instructions for
> > LLVM gather-scatter intrinsics ?
> >
> > Also, do the NVPTX and AMDGPU back-ends generate equivalent instructions
> > for GPUs ?
>
> Dear Sanjay,
>
> I suggest to just try this out. Create a simple test case and see what
> kind of assembly code is generated. Interesting will certainly be the
> AVX512 instructions for Xeon PHI.
>
> Best,
> Tobias
>
> >
> > Thank You,
> > Sanjay
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