[llvm-dev] InlineAsm and allocation to wrong register for indirect access

[Paulo Matos via llvm-dev]

On 22/07/16 11:30, Daniel Sanders wrote:
> Hi,
> 
> I'm not sure where this decision is done but it's possible that
> there's no constraint-specific selection of register classes for
> memory operands at the moment in which case it probably uses
> ${Target}RegisterInfo::getPointerRegClass() without checking the
> constraint code. I had a similar problem with constraint-specific
> offset ranges a year or so ago and found that all memory constraints
> were hardcoded to be 'm' regardless of the constraint in the inline
> assembly statement.
> 

Thanks Daniel,

I found the problem to be on our SelectInlineAsmMemoryOperand which was
not returning the correct operand. Now, if I implement it similarly to
PPC by returning a COPY_TO_REGCLASS of the operand, I get the correct
operand but with the strange offset.

So a load from an operand to r0: mov r0, %0, where %0 has 'm' constraint
is transformed into mov r0, @r4+12. r4 is the correct choice for a load
but I have no idea where `+12` comes from.

Do you know how to find where this offset could be added? The IR doesn't
show the operand show it's impossible to tell from a straightforward
debug dump.

-- 
Paulo Matos