[llvm-dev] InlineAsm and allocation to wrong register for indirect access

Daniel Sanders via llvm-dev llvm-dev at lists.llvm.org
Sun Jul 24 09:20:25 PDT 2016


> From: Paulo Matos [pmatos at linki.tools]
> Sent: 22 July 2016 19:52
> To: Daniel Sanders; llvm-dev at lists.llvm.org
> Subject: Re: [llvm-dev] InlineAsm and allocation to wrong register for indirect access
> 
> On 22/07/16 11:30, Daniel Sanders wrote:
> > Hi,
> >
> > I'm not sure where this decision is done but it's possible that
> > there's no constraint-specific selection of register classes for
> > memory operands at the moment in which case it probably uses
> > ${Target}RegisterInfo::getPointerRegClass() without checking the
> > constraint code. I had a similar problem with constraint-specific
> > offset ranges a year or so ago and found that all memory constraints
> > were hardcoded to be 'm' regardless of the constraint in the inline
> > assembly statement.
> >
> 
> Thanks Daniel,
> 
> I found the problem to be on our SelectInlineAsmMemoryOperand which was
> not returning the correct operand. Now, if I implement it similarly to
> PPC by returning a COPY_TO_REGCLASS of the operand, I get the correct
> operand but with the strange offset.
> 
> So a load from an operand to r0: mov r0, %0, where %0 has 'm' constraint
> is transformed into mov r0, @r4+12. r4 is the correct choice for a load
> but I have no idea where `+12` comes from.
> 
> Do you know how to find where this offset could be added? The IR doesn't
> show the operand show it's impossible to tell from a straightforward
> debug dump.
> 
> --
> Paulo Matos

One place Mips does it is in SelectInlineAsmMemoryOperand() (the second operand we push to OutOps is an offset) but if you're doing things the same way as PowerPC then it won't be that since it only pushes the base to OutOps.

It might be introduced when the compiler eliminates the frameindex placeholders. If that's the case you then you should be able to trace the offset back to a <frameindex> in the -print-after-all output. Simon fixed this problem for Mips in https://reviews.llvm.org/rL275786 when he made ${Target}RegisterInfo::eliminateFI() (it's called eliminateFrameIndex() on PowerPC) enforce the correct limit on the offsets for Constraint_ZC.


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