[llvm-dev] a bundle with one instruction

[Rail Shafigulin via llvm-dev]

You can have
>
> BUNDLE          // 2 instructions in a bundle
>   instruction1  //
>   instruction2  //
> instruction3    // single, non-bundled instruction
> BUNDLE          // another bundle with 2 instructions
>   instruction4  //
>   instruction5  //
>
> instruction3 is not bundled with anything, and it's between two other
> bundles---that's what I meant by "mixing".
>
>
> On Hexagon, on the hardware level, every instruction belongs to some
> packet, whether it's a packet with one or more instructions.  What we do is
> that we encode single instructions as single-instruction packets, but that
> happens after the IR is lowered to the MC form.
>
>
> -Krzysztof
>
>
> --
> Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted
> by The Linux Foundation
>

Just to clarify, when you say MC form do you mean Hexagon Assembly?
Apologies if the question seems silly. I've been working with LLVM only a
few months.


-- 
Rail Shafigulin
Software Engineer
Esencia Technologies
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