[llvm-dev] a bundle with one instruction

[Krzysztof Parzyszek via llvm-dev]

On 1/20/2016 6:27 PM, Rail Shafigulin wrote:
>
> I'm slightly confused. Can you elaborate on what it means to have
> bundles that are mixed with instructions that are not bundled?
>
> What I need for my target is to bundle every instruction, even if it is
> solo instruction. What would be the best way to achieve this? Current
> idea is to add a NOP instruction if MI has only one instruction in it.
> Is it possible?
>
> Any help is appreciated.

You can have

BUNDLE          // 2 instructions in a bundle
   instruction1  //
   instruction2  //
instruction3    // single, non-bundled instruction
BUNDLE          // another bundle with 2 instructions
   instruction4  //
   instruction5  //

instruction3 is not bundled with anything, and it's between two other 
bundles---that's what I meant by "mixing".


On Hexagon, on the hardware level, every instruction belongs to some 
packet, whether it's a packet with one or more instructions.  What we do 
is that we encode single instructions as single-instruction packets, but 
that happens after the IR is lowered to the MC form.

-Krzysztof


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