[llvm-dev] Register Number

[Krzysztof Parzyszek via llvm-dev]

On 9/17/2015 7:04 AM, Sky Flyer via llvm-dev wrote:
> It seems like d0 is always 14!
> I check it with ARMGenAsmMatcher.inc it was the same!
> How is it possible? because it should give the same register value that
> matches the underlying platform not any autogenerated value!?

The returned number is the register id as defined in 
<YourTarget>GenRegisterInfo.inc.  These numbers don't have any meaning 
other than to represent a particular register.  The 0x01 would be the 
encoding used in generating the binary.

The D0 has id 14 on ARM because there are 13 other registers preceding it:
namespace ARM {
enum {
   NoRegister,
   APSR = 1,
   APSR_NZCV = 2,
   CPSR = 3,
   FPEXC = 4,
   FPINST = 5,
   FPSCR = 6,
   FPSCR_NZCV = 7,
   FPSID = 8,
   ITSTATE = 9,
   LR = 10,
   PC = 11,
   SP = 12,
   SPSR = 13,
   D0 = 14,
   ...

-Krzysztof

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