[llvm-dev] Register Number

Sky Flyer via llvm-dev llvm-dev at lists.llvm.org
Thu Sep 17 05:04:39 PDT 2015


It seems like d0 is always 14!
I check it with ARMGenAsmMatcher.inc it was the same!
How is it possible? because it should give the same register value that
matches the underlying platform not any autogenerated value!?

On Thu, Sep 17, 2015 at 10:26 AM, Sky Flyer <skylake007 at googlemail.com>
wrote:

> Dear all,
>
> in my TestRegisterInfo.td file, I defined a register like this:
>
> class TestReg<bits<6> enc, string name> : Register<name> {
>   let HWEncoding{5-0} = enc;
>   let Namespace = "TEST";
> }
>
> def D0   : TestReg<0x01,   "d0">, DwarfRegNum<[1]>;
>
> but when I compile, the result I have in TestGenAsmMatcher.inc is this:
>
> case 'd':    // 7 strings to match.
>   switch (Name[1]) {
>       case '0':  // 1 string to match.
>         return* 14*;       // "d0"
>
> I supposed I will get either 1 (because of encoding) or 0 (because of
> DwarfRegNum). Is this 14 something system generated? How can I assign my
> own number to the registers?
>
> Cheers,
> ES
>
>
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