[LLVMdev] use of ARM GPRPair register class

[Ana Pazos]

Hi,

 

I am experimenting with creating instructions that write into virtual
registers that use the ARM GPRPair register class in Pre-RA phase.

 

During register allocation, I hit an assertion because the code is not in
SSA form:

 

lib/CodeGen/MachineRegisterInfo.cpp:271: llvm::MachineInstr*
llvm::MachineRegisterInfo::getVRegDef(unsigned int) const: Assertion
`(I.atEnd() || llvm::next(I) == def_end()) && "getVRegDef assumes a single
definition or no definition"' failed.

 

The code in lib\CodeGen\MachineRegisterInfo.cpp has information about the
virtual register's sub-register been written, but that info is not
propagated to getVRegDef.

 

Is it possible/ is there any plan to update the code analysis to distinguish
virtual register's sub-registers definitions? So that GPRPair sub-registers
can be used by instructions that do not return 64 bit value?

 

Example:

This is a simple example of machine instructions I caused to be generated. I
forced the LDRi12 instructions to use a GPRPair sub-register.

The copy into %vreg4  asserts because of the two definitions of vreg9,
coming from vreg9:gsub_0 and vreg9:gsub_1.

 

        %vreg1<def> = COPY %R1; GPR:%vreg1

        %vreg2<def> = MOVi32imm <ga:@a>; GPR:%vreg2

        %vreg3<def> = ADDrsi %vreg2<kill>, %vreg1, 18, pred:14, pred:%noreg,
opt:%noreg; GPR:%vreg3,%vreg2,%vreg1

        %vreg9:gsub_0<def,read-undef> = LDRi12 %vreg3, 112, pred:14,
pred:%noreg; mem:LD4[%arrayidx83](tbaa=!"int") GPRPair:%vreg9 :%vreg3

        %vreg9:gsub_1<def,read-undef> = LDRi12 %vreg3, 116, pred:14,
pred:%noreg; mem:LD4[%arrayidx86](tbaa=!"int") GPRPair:%vreg9 :%vreg3

        %vreg4<def> = COPY %vreg9:gsub_0; GPR:%vreg4 GPRPair:%vreg9

        %vreg5<def> = COPY %vreg9:gsub_1; GPR:%vreg5 GPRPair:%vreg9

        %vreg6<def> = LDRi12 %vreg3, 120, pred:14, pred:%noreg;
mem:LD4[%arrayidx89](tbaa=!"int") GPR:%vreg6,%vreg3

        %vreg7<def> = ADDrr %vreg4<kill>, %vreg5<kill>, pred:14,
pred:%noreg, opt:%noreg; GPR:%vreg7,%vreg4,%vreg5

        %vreg8<def> = ADDrr %vreg7<kill>, %vreg6<kill>, pred:14,
pred:%noreg, opt:%noreg; GPR:%vreg8,%vreg7,%vreg6

        %R0<def> = COPY %vreg8; GPR:%vreg8

        BX_RET pred:14, pred:%noreg, %R0<imp-use>

 

Thanks,
Ana.

-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20130423/9eaca936/attachment.html>