[LLVMdev] Indirect Branch Representation

[kapil anand]

Just to make sure, can the label in a branch instruction be a "variable"?

On Thu, Jul 24, 2008 at 12:08 AM, Eli Friedman <eli.friedman at gmail.com>
wrote:

> On Wed, Jul 23, 2008 at 8:47 PM, kapil anand <kapilanand2 at gmail.com>
> wrote:
> >
> > Specifically, I need a way to represent indirect branch instruction (in
> > binary) as an equivalent LLVM instruction. With switch instruction , I
> would
> > have to list all the possible targets and then initialize the
> corresponding
> > instruction. I was just thinking whether it might be possible to have
> some
> > kind of indirect branch where label is a "variable" and not an explicit
> > label present in module.
>
> Oh... I think you're stuck with either a massive switch statement or tail
> calls.
>
> -Eli
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