[llvm] [DAG][X86] Bitfield insertion can combine into SHL + SHRD (PR #220182)

[Simon Pilgrim via llvm-commits]

================
@@ -32285,8 +32285,44 @@ static SDValue LowerFunnelShift(SDValue Op, const X86Subtarget &Subtarget,
     return DAG.getZExtOrTrunc(Res, DL, VT);
   }
 
-  if (VT == MVT::i8 || ExpandFunnel)
+  // If expanding the funnel shift is required OR the value type is unsupported
+  if (VT == MVT::i8 || ExpandFunnel) {
+    // Proceed if one operand is the result of an ISD::SHL or the node is
+    // MVT::i8
+    if (Op1.getOpcode() == ISD::SHL && isa<ConstantSDNode>(Amt.getNode())) {
+
+      ConstantSDNode *C = dyn_cast<ConstantSDNode>(Amt.getNode());
----------------
RKSimon wrote:

(style)
```suggestion
      auto *C = dyn_cast<ConstantSDNode>(Amt.getNode());
```

https://github.com/llvm/llvm-project/pull/220182