[llvm] [DAG][X86] Bitfield insertion can combine into SHL + SHRD (PR #220182)
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Thu Sep 10 06:07:37 PDT 2026
================
@@ -32285,8 +32285,44 @@ static SDValue LowerFunnelShift(SDValue Op, const X86Subtarget &Subtarget,
return DAG.getZExtOrTrunc(Res, DL, VT);
}
- if (VT == MVT::i8 || ExpandFunnel)
+ // If expanding the funnel shift is required OR the value type is unsupported
+ if (VT == MVT::i8 || ExpandFunnel) {
+ // Proceed if one operand is the result of an ISD::SHL or the node is
+ // MVT::i8
+ if (Op1.getOpcode() == ISD::SHL && isa<ConstantSDNode>(Amt.getNode())) {
+
+ ConstantSDNode *C = dyn_cast<ConstantSDNode>(Amt.getNode());
+ SDValue SHLOperandShiftAmount = Op1->getOperand(1);
+ APInt InvMaskWidth = C->getAPIntValue();
+
+ if (ConstantSDNode *EC =
+ dyn_cast<ConstantSDNode>(SHLOperandShiftAmount.getNode())) {
+ APInt ExpectedShiftAmount = EC->getAPIntValue();
+
+ // Check if the shift amounts match.
+ if (ExpectedShiftAmount != InvMaskWidth)
+ return SDValue();
+ }
+
+ APInt MaskWidth = EltSizeInBits - InvMaskWidth;
+ uint64_t ShiftAmount = MaskWidth.getZExtValue();
+ SDValue SHLOperand = Op1.getOperand(0);
+
+ APInt Mask = APInt::getLowBitsSet(EltSizeInBits, ShiftAmount);
+
+ SDValue MaskBitNum = DAG.getShiftAmountConstant(
+ ShiftAmount, SHLOperand.getValueType(), DL);
----------------
RKSimon wrote:
Isn't SHLOperand.getValueType() going to be VT?
https://github.com/llvm/llvm-project/pull/220182
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