[llvm] [AArch64] Enable CMP+CSEL fusion under Generic (PR #222280)

[Shanzhi Chen via llvm-commits]

chenshanzhi wrote:

**Proposal to enable FeatureFuseCmpCSel under Generic for AArch64 cores**

The backgroud is as follows:

1. An increased number of modern cores support CMP+CSEL fusion.
  - Cortex-A78, Cortex-A78AE, Cortex-A78C, Cortex-A710, Cortex-A715, Cortex-A720, Cortex-A720AE, Cortex-A725
  - Cortex-X4, Cortex-X925
  - C1-Pro, C1-Premium, C1-Ultra
  - Neoverse N2, Neoverse N3, Neoverse V1, Neoverse V2, Neoverse V3, Neoverse V3AE
  - Apple A14 and later chips

2. According to the following blog, GCC plans to enable CMP+CSEL fusion by default for all AArch64 cores.
https://developer.arm.com/community/arm-community-blogs/b/tools-software-ides-blog/posts/gcc-15-continuously-improving#CMP
<img width="783" height="213" alt="image" src="https://github.com/user-attachments/assets/89b9b360-e706-4abf-b841-c9c394f2df14" />

3. In fact, GCC-15 supports CMP+CSEL fusion for generic cpu when given `-march=armv9-a`: https://godbolt.org/z/Pq61rvfrn

Considering the prevalence of FeatureFuseCmpCSel in current and future hardware, as well as its minimal impact on cores that do not support it, I believe this is a low-risk change. Therefore, I propose enabling FeatureFuseCmpCSel under Generic for AArch64 cores.

https://github.com/llvm/llvm-project/pull/222280