[llvm] [AArch64] Fold four and eight way partial reductions with [SU]ADDLP (PR #214636)

[Adam Scott via llvm-commits]

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@@ -19199,6 +19208,13 @@ bool AArch64TargetLowering::optimizeExtendOrTruncateConversion(
                       m_Intrinsic<Intrinsic::vector_partial_reduce_add>(
                           m_Value(), m_Specific(I))))
               return true;
+            // The extend can also reach a partial reduction through a mul
+            // of two extends, which folds into the reduction.
+            if (match(SingleUser, m_c_Mul(m_Specific(I), m_ZExt(m_Value()))) &&
+                SingleUser->hasOneUse() &&
+                match(SingleUser->user_back(),
+                      m_Intrinsic<Intrinsic::vector_partial_reduce_add>()))
+              return true;
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as4230 wrote:

Only this PR makes it profitable for base neon. If you take just the CGP change on main you get a ushll/uaddw chain instead so I can make it a follow up after this lands. 

https://github.com/llvm/llvm-project/pull/214636