[llvm] [RISCV][GlobalISel] Legalize and select G_PREFETCH (PR #215466)

[Kane Wang via llvm-commits]

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@@ -1444,11 +1445,56 @@ bool RISCVInstructionSelector::select(MachineInstr &MI) {
     return selectExtractSubvector(MI);
   case TargetOpcode::G_INSERT_SUBVECTOR:
     return selectInsertSubVector(MI);
+  case TargetOpcode::G_PREFETCH:
+    return selectPrefetch(MI);
   default:
     return false;
   }
 }
 
+bool RISCVInstructionSelector::selectPrefetch(MachineInstr &MI) const {
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ReVe1uv wrote:

> This seems tablegenable. The implementation is also very different rom what the DAG one does; they shouldn't be fundamentally different

Should I add a `GIComplexPatternEquiv` for `AddrRegImmLsb00000` so the existing patterns import, plus a GISel matcher mirroring `SelectAddrRegImmLsb00000`? I went with a custom selector since the **ComplexPattern** has no GI equivalent today.

https://github.com/llvm/llvm-project/pull/215466