[llvm] [RISCV][GlobalISel] Legalize and select G_PREFETCH (PR #215466)

[Matt Arsenault via llvm-commits]

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@@ -1444,11 +1445,56 @@ bool RISCVInstructionSelector::select(MachineInstr &MI) {
     return selectExtractSubvector(MI);
   case TargetOpcode::G_INSERT_SUBVECTOR:
     return selectInsertSubVector(MI);
+  case TargetOpcode::G_PREFETCH:
+    return selectPrefetch(MI);
   default:
     return false;
   }
 }
 
+bool RISCVInstructionSelector::selectPrefetch(MachineInstr &MI) const {
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arsenm wrote:

This seems tablegenable. The implementation is also very different rom what the DAG one does; they shouldn't be fundamentally different 

https://github.com/llvm/llvm-project/pull/215466