[llvm] [X86][AsmParser] Support parentheses around scale and index register in Intel syntax (PR #211003)

[Evgenii Kudriashov via llvm-commits]

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@@ -940,10 +968,20 @@ class X86AsmParser : public MCTargetAsmParser {
         State = IES_ERROR;
         break;
       case IES_INTEGER:
+        State = IES_MULTIPLY;
+        IC.pushOperator(IC_MULTIPLY);
+        break;
       case IES_REGISTER:
       case IES_RPAREN:
-        State = IES_MULTIPLY;
+        // A register before '*' is a scaled index register. If no scale is
+        // pending yet, replace its operand-stack entry with an immediate so
+        // the infix calculator does not evaluate a reg * int product.
+        if (TmpReg && (!TmpScale.has_value())) {
+          IC.popOperand();
+          IC.pushOperand(IC_IMM);
+        }
         IC.pushOperator(IC_MULTIPLY);
+        State = IES_MULTIPLY;
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e-kud wrote:

Nit. Can we reorder these two lines to keep the previous code and so minimize the diff?

https://github.com/llvm/llvm-project/pull/211003