[llvm] [X86][AsmParser] Support parentheses around scale and index register in Intel syntax (PR #211003)

[Evgenii Kudriashov via llvm-commits]

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@@ -818,31 +839,39 @@ class X86AsmParser : public MCTargetAsmParser {
         break;
       case IES_PLUS:
       case IES_MINUS:
-      case IES_LPAREN:
       case IES_LBRAC:
         State = IES_REGISTER;
         TmpReg = Reg;
         IC.pushOperand(IC_REGISTER);
+        if (NegativeAdditiveTerm) {
+          ErrMsg = "Scale can't be negative";
+          return true;
+        }
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e-kud wrote:

Is it enough? I mean don't we need to check if TmpScale has value?

https://github.com/llvm/llvm-project/pull/211003