[llvm] [AMDGPU] Enable WMMA256bInsts + Wave32 for gfx1200/gfx1201 + SISchedule fix + TargetParser gfx1200 propagation (PR #202093)

[via llvm-commits]

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@@ -494,6 +494,20 @@ def : HWWriteRes<WriteSALUDummy, [HWSALU],  2>;
 
 }  // End SchedModel = GFX12SpeedModel
 
+let SchedModel = GFX12SpeedModel in {
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clearnature wrote:

Multiple `let SchedModel = GFX12SpeedModel in { ... }` blocks are additive                                                                                                                                                          
 in TableGen — they don't overwrite. The same pattern is used throughout                                                                                                                                                             
 SISchedule.td for other speed models. Our block adds WMMA/SWMMAC scheduling 
 entries to the existing GFX12SpeedModel without touching the original 
 definitions above line 494. 


https://github.com/llvm/llvm-project/pull/202093