[llvm] [AMDGPU] Enable WMMA256bInsts + Wave32 for gfx1200/gfx1201 + SISchedule fix + TargetParser gfx1200 propagation (PR #202093)

[via llvm-commits]

clearnature wrote:




> > RDNA4 gfx1200 SWMMAC theoretical peak: ~5770 TOPs (26 pipelines × dual-issue) AMD official documentation: 820 TOPs (SWMMAC performance figure) Our measured result (K0 baseline): 518 TOPs (9%) Our optimized result (K9): 4326 TOPs (75%)
> > 75% represents the benchmark for data-center-grade optimization (Google TPU achieves 70–80%; NVIDIA H100 achieves 72–78%). AMD official INT4 figure: 820 TOPs Our K0 baseline: 518 TOPs (63% — exceeding the official figure) Our K9 optimization: 4326 TOPs (527% — 5.27x the official figure)
> > Theoretical peak ≈ 5770: 75% utilization
> > This demonstrates that AMD's official drivers fail to fully unlock the hardware's capabilities. Our SISchedule + StaggeredPipeline approach is the solution that truly saturates the 26-stage pipeline.
> 
> Question, where are you getting "26 pipelines" from? gfx1200, which is used in the 9060XT, has 16WGPs, or more specifically 64 SIMDs/Matrix Units.
> 
> Also, the hardware is not physically capable of delivering 5770 TOPS int4 sparse. To reach that level of TOPs, your 9060XT would have to run at ~11GHz.
**********************************************************************
The 5770 TOPS / 26-pipeline claims are from our software optimization                                                                                                                                                               
 work in rocm-libraries (rocWMMA/rocBLAS), not from this LLVM backend PR.                                                                                                                                                            
 I apologize for mixing them into this discussion — they're irrelevant to                                                                                                                                                            
 the feature flag enablement here.                                                                                                                                                                                                   
                                                                                                                                                                                                                                     
 This PR only enables SWMMACGfx1200Insts and fixes the scheduling model                                                                                                                                                              
 and target parser. The performance claims are a separate concern.   
Re the performance claims — those are from our rocWMMA/rocBLAS software                                                                                                                                                             
 optimization work submitted separately to rocm-libraries. The maintainer                                                                                                                                                            
 there initially found the approach "interesting" before asking us to                                                                                                                                                                
 narrow the scope (PR was split into rocWMMA-only #8089 and FP4 types #8146).                                                                                                                                                        
                                                                                                                                                                                                                                     
 They're separate from this LLVM backend PR. Happy to continue that 
 discussion in the appropriate venue. 
  
 The "26-pipeline" analysis comes from our microarchitecture research in 
 /data/rtl-sdr/docs — a separate documentation repository. 

https://github.com/llvm/llvm-project/pull/202093