[llvm] [AMDGPU] Enable WMMA256bInsts + Wave32 for gfx1200/gfx1201 + SISchedule fix + TargetParser gfx1200 propagation (PR #202093)
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Mon Jun 8 04:27:18 PDT 2026
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@@ -1570,7 +1572,8 @@ def FeatureGFX12 : GCNSubtargetFeatureGeneration<"GFX12",
FeatureIEEEMinimumMaximumInsts, FeatureSALUMinimumMaximumInsts,
FeatureMinimum3Maximum3F32, FeatureMinimum3Maximum3F16,
FeatureAgentScopeFineGrainedRemoteMemoryAtomics, FeatureFlatOffsetBits24,
- FeatureFlatSignedOffset, FeatureInstCacheLineSize128
+ FeatureFlatSignedOffset, FeatureInstCacheLineSize128,
+ FeatureWMMA256bInsts
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clearnature wrote:
You're right on both points — WMMA256bInsts was incorrectly included, and
FeatureWavefrontSize32 was misplaced. I've verified against the RDNA4 ISA
document (§7.12) and neither belongs on gfx1200. Both have been removed.
The remaining changes are SWMMACGfx1200Insts (documented in the ISA),
SISchedule WMMA scheduling entries (additive, not overwriting), and
TargetParser propagation. All tests pass.
Thanks for catching this.
https://github.com/llvm/llvm-project/pull/202093
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