[llvm] [RegisterScavenging] Respect early-clobber when scavenging registers (PR #184814)

[Matt Arsenault via llvm-commits]

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@@ -140,10 +140,14 @@ class RegScavenger {
   ///
   /// If \p AllowSpill is false, fail if a spill is required to make the
   /// register available, and return NoRegister.
+  /// If \p InspectNext is true, inspect the instruction at MBBI
+  /// for early-clobber def regs that need to be excluded from the set
+  /// of valid registers.
   Register scavengeRegisterBackwards(const TargetRegisterClass &RC,
                                      MachineBasicBlock::iterator To,
                                      bool RestoreAfter, int SPAdj,
-                                     bool AllowSpill = true);
+                                     bool AllowSpill = true,
+                                     bool InspectNext = false);
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arsenm wrote:

I mean anything that is earlyclobber specific should be a bug in findSurvivorBackwards or LiveRegUnits handling of an instruction. You shouldn't need to be thinking about the specifics of the insertion point depending on what instructions happen to be around 

https://github.com/llvm/llvm-project/pull/184814