[llvm] [RegisterScavenging] Respect early-clobber when scavenging registers (PR #184814)

[Dominik Steenken via llvm-commits]

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@@ -140,10 +140,14 @@ class RegScavenger {
   ///
   /// If \p AllowSpill is false, fail if a spill is required to make the
   /// register available, and return NoRegister.
+  /// If \p InspectNext is true, inspect the instruction at MBBI
+  /// for early-clobber def regs that need to be excluded from the set
+  /// of valid registers.
   Register scavengeRegisterBackwards(const TargetRegisterClass &RC,
                                      MachineBasicBlock::iterator To,
                                      bool RestoreAfter, int SPAdj,
-                                     bool AllowSpill = true);
+                                     bool AllowSpill = true,
+                                     bool InspectNext = false);
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dominik-steenken wrote:

Maybe i am misunderstanding - If i pass `std::next(DefMI.getIterator())` in `RegisterScavenging.cpp:413`, I'd be excluding the defining MI from consideration, while fully including the using MI, even though i only want its early-clobber def reg to be considered?

https://github.com/llvm/llvm-project/pull/184814