[llvm] 1d30ae6 - AMDGPU: Stop forcing RequiresCodeGenSCCOrder (#169522)

[via llvm-commits]

Author: Matt Arsenault
Date: 2025-11-25T13:23:55-05:00
New Revision: 1d30ae6e402a28018a5574b7c68d71aac14acd63

URL: https://github.com/llvm/llvm-project/commit/1d30ae6e402a28018a5574b7c68d71aac14acd63
DIFF: https://github.com/llvm/llvm-project/commit/1d30ae6e402a28018a5574b7c68d71aac14acd63.diff

LOG: AMDGPU: Stop forcing RequiresCodeGenSCCOrder (#169522)

This hasn't been strictly necessary since c897c13dde.
Practically this makes little difference; we still enable IPRA
by default which implies this option. By removing this explicit
force, -enable-ipra=0 has the expected change in the pass pipeline
to remove the DummyCGSCC runs.

Added: 
    

Modified: 
    llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
index 23ca4dcc009c8..e5a35abe6da6b 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
@@ -1226,10 +1226,6 @@ class GCNPassConfig final : public AMDGPUPassConfig {
 public:
   GCNPassConfig(TargetMachine &TM, PassManagerBase &PM)
       : AMDGPUPassConfig(TM, PM) {
-    // It is necessary to know the register usage of the entire call graph.  We
-    // allow calls without EnableAMDGPUFunctionCalls if they are marked
-    // noinline, so this is always required.
-    setRequiresCodeGenSCCOrder(true);
     substitutePass(&PostRASchedulerID, &PostMachineSchedulerID);
   }