[llvm] 8f1bb92 - [NVPTX] Fix lit test issues from masked load/store implementation (#169535)

[via llvm-commits]

Author: Drew Kersnar
Date: 2025-11-25T12:27:31-06:00
New Revision: 8f1bb92bbfa45d49103953dad0d0a5dcfd388959

URL: https://github.com/llvm/llvm-project/commit/8f1bb92bbfa45d49103953dad0d0a5dcfd388959
DIFF: https://github.com/llvm/llvm-project/commit/8f1bb92bbfa45d49103953dad0d0a5dcfd388959.diff

LOG: [NVPTX] Fix lit test issues from masked load/store implementation (#169535)

>From this commit:
https://github.com/llvm/llvm-project/commit/17852deda7fb9dabb41023e2673025c630b9369d,
Build was broken here:
https://lab.llvm.org/buildbot/#/builders/155/builds/15135/steps/7/logs/stdio.
I think this should fix things.

Added: 
    

Modified: 
    llvm/test/CodeGen/NVPTX/masked-load-vectors.ll
    llvm/test/CodeGen/NVPTX/masked-store-variable-mask.ll
    llvm/test/CodeGen/NVPTX/masked-store-vectors-256.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/NVPTX/masked-load-vectors.ll b/llvm/test/CodeGen/NVPTX/masked-load-vectors.ll
index 8617dea310d6c..3f72ffe71b622 100644
--- a/llvm/test/CodeGen/NVPTX/masked-load-vectors.ll
+++ b/llvm/test/CodeGen/NVPTX/masked-load-vectors.ll
@@ -1,8 +1,8 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc < %s -march=nvptx64 -mcpu=sm_90 | FileCheck %s -check-prefixes=CHECK,SM90
-; RUN: %if ptxas %{ llc < %s -march=nvptx64 -mcpu=sm_90 | %ptxas-verify -arch=sm_90 %}
+; RUN: llc < %s -march=nvptx64 -mcpu=sm_90 -mattr=+ptx88 | FileCheck %s -check-prefixes=CHECK,SM90
+; RUN: %if ptxas-sm_90 && ptxas-isa-8.8 %{ llc < %s -march=nvptx64 -mcpu=sm_90 -mattr=+ptx88 | %ptxas-verify -arch=sm_90 %}
 ; RUN: llc < %s -march=nvptx64 -mcpu=sm_100 -mattr=+ptx88 | FileCheck %s -check-prefixes=CHECK,SM100
-; RUN: %if ptxas %{ llc < %s -march=nvptx64 -mcpu=sm_100 -mattr=+ptx88 | %ptxas-verify -arch=sm_100 %}
+; RUN: %if ptxas-sm_100 && ptxas-isa-8.8 %{ llc < %s -march=nvptx64 -mcpu=sm_100 -mattr=+ptx88 | %ptxas-verify -arch=sm_100 %}
 
 
 ; Different architectures are tested in this file for the following reasons:

diff  --git a/llvm/test/CodeGen/NVPTX/masked-store-variable-mask.ll b/llvm/test/CodeGen/NVPTX/masked-store-variable-mask.ll
index 9f23acaf93bc8..bbe2dbb6447bb 100644
--- a/llvm/test/CodeGen/NVPTX/masked-store-variable-mask.ll
+++ b/llvm/test/CodeGen/NVPTX/masked-store-variable-mask.ll
@@ -1,6 +1,6 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
 ; RUN: llc < %s -march=nvptx64 -mcpu=sm_100 -mattr=+ptx88 | FileCheck %s -check-prefixes=CHECK
-; RUN: %if ptxas %{ llc < %s -march=nvptx64 -mcpu=sm_100 -mattr=+ptx88 | %ptxas-verify -arch=sm_100 %}
+; RUN: %if ptxas-sm_100 && ptxas-isa-8.8 %{ llc < %s -march=nvptx64 -mcpu=sm_100 -mattr=+ptx88 | %ptxas-verify -arch=sm_100 %}
 
 ; Confirm that a masked store with a variable mask is scalarized before lowering
 

diff  --git a/llvm/test/CodeGen/NVPTX/masked-store-vectors-256.ll b/llvm/test/CodeGen/NVPTX/masked-store-vectors-256.ll
index feb7b7e0a0b39..44f35058310a6 100644
--- a/llvm/test/CodeGen/NVPTX/masked-store-vectors-256.ll
+++ b/llvm/test/CodeGen/NVPTX/masked-store-vectors-256.ll
@@ -1,8 +1,8 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc < %s -march=nvptx64 -mcpu=sm_90 | FileCheck %s -check-prefixes=CHECK,SM90
-; RUN: %if ptxas %{ llc < %s -march=nvptx64 -mcpu=sm_90 | %ptxas-verify -arch=sm_90 %}
+; RUN: llc < %s -march=nvptx64 -mcpu=sm_90 -mattr=+ptx88 | FileCheck %s -check-prefixes=CHECK,SM90
+; RUN: %if ptxas-sm_90 && ptxas-isa-8.8 %{ llc < %s -march=nvptx64 -mcpu=sm_90 -mattr=+ptx88 | %ptxas-verify -arch=sm_90 %}
 ; RUN: llc < %s -march=nvptx64 -mcpu=sm_100 -mattr=+ptx88 | FileCheck %s -check-prefixes=CHECK,SM100
-; RUN: %if ptxas %{ llc < %s -march=nvptx64 -mcpu=sm_100 -mattr=+ptx88 | %ptxas-verify -arch=sm_100 %}
+; RUN: %if ptxas-sm_100 && ptxas-isa-8.8 %{ llc < %s -march=nvptx64 -mcpu=sm_100 -mattr=+ptx88 | %ptxas-verify -arch=sm_100 %}
 
 ; This test is based on load-store-vectors.ll,
 ; and contains testing for lowering 256-bit masked vector stores