[llvm] [RISCV] Use vsetivli instead of `x0,x0` form to retain SEW/LMUL when AVL is imm (PR #169307)
Luke Lau via llvm-commits
llvm-commits at lists.llvm.org
Tue Nov 25 01:54:03 PST 2025
================
@@ -1725,6 +1737,14 @@ void RISCVInsertVSETVLI::doPRE(MachineBasicBlock &MBB) {
AvailableInfo, OldExit);
}
+bool RISCVInsertVSETVLI::isVLPreserving(const MachineInstr &PrevMI,
+ const MachineInstr &MI) const {
+ return MI.getOpcode() == RISCV::PseudoVSETIVLI &&
+ PrevMI.getOpcode() == RISCV::PseudoVSETIVLI &&
+ getInfoForVSETVLI(PrevMI).getAVLImm() ==
+ getInfoForVSETVLI(MI).getAVLImm();
----------------
lukel97 wrote:
Nit/premature optimization :), instead of constructing the VSETVLIInfo I think you can just check PrevMI.getOperand(1).getImm() == MI.getOperand(1).getImm(). And then I think you can make the function static
https://github.com/llvm/llvm-project/pull/169307
More information about the llvm-commits
mailing list