[llvm] [RISCV] Use vsetivli instead of `x0,x0` form to retain SEW/LMUL when AVL is imm (PR #169307)

Luke Lau via llvm-commits llvm-commits at lists.llvm.org
Tue Nov 25 01:54:27 PST 2025

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https://github.com/lukel97 edited https://github.com/llvm/llvm-project/pull/169307

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