[llvm] [X86] Fix places where we use X86ISD::CMP where we should use SUBS (PR #163476)
via llvm-commits
llvm-commits at lists.llvm.org
Tue Oct 14 17:03:08 PDT 2025
github-actions[bot] wrote:
<!--LLVM CODE FORMAT COMMENT: {clang-format}-->
:warning: C/C++ code formatter, clang-format found issues in your code. :warning:
<details>
<summary>
You can test this locally with the following command:
</summary>
``````````bash
git-clang-format --diff origin/main HEAD --extensions cpp -- llvm/lib/Target/X86/X86ISelLowering.cpp --diff_from_common_commit
``````````
:warning:
The reproduction instructions above might return results for more than one PR
in a stack if you are using a stacked PR workflow. You can limit the results by
changing `origin/main` to the base branch/commit you want to compare against.
:warning:
</details>
<details>
<summary>
View the diff from clang-format here.
</summary>
``````````diff
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index eea60bf90..25c4b7cb6 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -23118,9 +23118,10 @@ static SDValue LowerVectorAllEqual(const SDLoc &DL, SDValue LHS, SDValue RHS,
DAG.getConstant(0, DL, MVT::i32));
}
SDVTList CmpVTs = DAG.getVTList(IntVT, MVT::i32);
- return DAG.getNode(X86ISD::SUB, DL, CmpVTs,
- DAG.getBitcast(IntVT, MaskBits(LHS)),
- DAG.getBitcast(IntVT, MaskBits(RHS))).getValue(1);
+ return DAG
+ .getNode(X86ISD::SUB, DL, CmpVTs, DAG.getBitcast(IntVT, MaskBits(LHS)),
+ DAG.getBitcast(IntVT, MaskBits(RHS)))
+ .getValue(1);
}
// Without PTEST, a masked v2i64 or-reduction is not faster than
@@ -48968,9 +48969,11 @@ static SDValue combineSetCCMOVMSK(SDValue EFLAGS, X86::CondCode &CC,
SDLoc DL(EFLAGS);
APInt CmpMask = APInt::getLowBitsSet(32, IsAnyOf ? 0 : BCNumElts);
SDVTList CmpVTs = DAG.getVTList(MVT::i32, MVT::i32);
- return DAG.getNode(X86ISD::SUB, DL, CmpVTs,
- DAG.getNode(X86ISD::MOVMSK, DL, MVT::i32, BC),
- DAG.getConstant(CmpMask, DL, MVT::i32)).getValue(1);
+ return DAG
+ .getNode(X86ISD::SUB, DL, CmpVTs,
+ DAG.getNode(X86ISD::MOVMSK, DL, MVT::i32, BC),
+ DAG.getConstant(CmpMask, DL, MVT::i32))
+ .getValue(1);
}
}
@@ -48990,9 +48993,11 @@ static SDValue combineSetCCMOVMSK(SDValue EFLAGS, X86::CondCode &CC,
DAG.getBitcast(SubVT, Ops[1]));
V = DAG.getBitcast(VecVT.getHalfNumVectorElementsVT(), V);
SDVTList CmpVTs = DAG.getVTList(MVT::i32, MVT::i32);
- return DAG.getNode(X86ISD::SUB, DL, CmpVTs,
- DAG.getNode(X86ISD::MOVMSK, DL, MVT::i32, V),
- DAG.getConstant(CmpMask, DL, MVT::i32)).getValue(1);
+ return DAG
+ .getNode(X86ISD::SUB, DL, CmpVTs,
+ DAG.getNode(X86ISD::MOVMSK, DL, MVT::i32, V),
+ DAG.getConstant(CmpMask, DL, MVT::i32))
+ .getValue(1);
}
}
@@ -49076,8 +49081,10 @@ static SDValue combineSetCCMOVMSK(SDValue EFLAGS, X86::CondCode &CC,
DAG.getConstant(0xAAAAAAAA, DL, MVT::i32));
}
SDVTList CmpVTs = DAG.getVTList(MVT::i32, MVT::i32);
- return DAG.getNode(X86ISD::SUB, DL, CmpVTs, Result,
- DAG.getConstant(CmpMask, DL, MVT::i32)).getValue(1);
+ return DAG
+ .getNode(X86ISD::SUB, DL, CmpVTs, Result,
+ DAG.getConstant(CmpMask, DL, MVT::i32))
+ .getValue(1);
}
}
}
@@ -49111,7 +49118,8 @@ static SDValue combineSetCCMOVMSK(SDValue EFLAGS, X86::CondCode &CC,
Result =
DAG.getZExtOrTrunc(Result, DL, EFLAGS.getOperand(0).getValueType());
SDVTList CmpVTs = DAG.getVTList(Result.getValueType(), MVT::i32);
- return DAG.getNode(X86ISD::SUB, DL, CmpVTs, Result, EFLAGS.getOperand(1)).getValue(1);
+ return DAG.getNode(X86ISD::SUB, DL, CmpVTs, Result, EFLAGS.getOperand(1))
+ .getValue(1);
}
// MOVMSKPS(V) !=/== 0 -> TESTPS(V,V)
``````````
</details>
https://github.com/llvm/llvm-project/pull/163476
More information about the llvm-commits
mailing list